ASIC/SoC Verification Manager (m/f)

Schuh-Eder Consulting GmbH

Lake Constance

Aim

This position is responsible for leading the hardware design team of verification and validation engineers throughout the entire process.

Company

Our client is a high-tech company in the field of semiconductor and develops high quality products for industrial and automotive markets.

Main Tasks

  • Drive and guide the verification activities incl. introducing new tools and methods
  • Lead a team of verification and validation engineers
  • Planning, tracking and execution of verification projects
  • Advisory team member to all aspects of the ASIC development

Requirements

  • Team player and open minded
  • MSc (or equivalent) degree with minimum 7 years experience in ASIC Design & Verification
  • Experience in a technical leader or manager role
  • Excellence in hardware description languages (Verilog, SV) and verification methodologies
  • Professional in tool handling - simulation, formal verification, linting, RTC,CTC
  • Knowhow in writing and adopting C/C++ for verification and validation
  • Experience in FPGA prototyping and embedded HW/SW design is a plus
  • Experience with complex host interfaces like PCIe, eMMC, SD, etc. is a plus
  • Excellent written and verbal communication skills in English and German

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Interesse?

Victoria Renner
08106-3684-51

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